Zoom V3 1612 Manual de usuario Pagina 14
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Valorado. / 5. Basado en revisión del cliente
BIT1612 10-Bit Digital Video Decoder with OSD and T-CON
4
5 Pin Definition
101
100
99
98
97
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
VSS18
PLL_VSS
TOUT3
TOUT4
VDD18
PLL_VDD
60
61
62
63
64
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
TEST
ICLK1
SRST
121
122
123
124
125
126
127
128
39
38
37
36
35
34
VSS18
33
OP5
OP4
OP3
OP2
OP0
OP1
VDD18
OSCI
OSCO
IR
BIN1
VDD33
ICLK2
BIN0
BIN4
BIN2
BIN5
BIN6
BIN7
AVDD
AIN11
AIN12
YCMY
BIN3
AGND
AGND
AVDD
BOUT0
BOUT3
BOUT4
BOUT6
BOUT7
VDD33
BOUT5
OCLK
SRGB_D0
BOUT2
SRGB_D1
SRGB_D2
SRGB_D4
SRGB_D5
SRGB_D7
SRGB_D8
GND33
SRGB_CK
SRGB_CS
SRGB_DIO
TOUT0
TOUT1
VDD33
TOUT2
BOUT1
SRGB_D3
SRGB_D6
Figure 5-1 Pin Configuration
Table 5-1 BIT1612 Pin Definition
Pin Name Pin # Pin Type Function Description Pad Type
IBEXT 1 AIO
Monitor Internal Bias Current Generation or
External Bypass for Use with Some Test Mode
VREFP 2 AIO
Output for Decoupling or Bypass of
Positive Internal Reference Voltage
VCM 3 AIO
Output for Decoupling or Bypass
Common Mode Voltage
VREFN 4 AIO
Output for Decoupling or Bypass of
Negative Internal Reference Voltage
AGND 5 AG33 Analog Ground and Reference Generators
VBG 6 AIO
Output for Decoupling or Bypass of
Band-Gap Voltage
VCMC 7 AI Chroma Channel PGA Negative Reference Input
AIN2 8 AI ADC 2 Input (Y / CVBS)
AVDD 9 AP33 AFE ADC Power (3.3V)
AGND 10 AG33 AFE ADC GND (3.3V)
- BIT1612 1
- Content 2
- 1 General Description 11
- 2 Features 11
- 3 Order Information 13
- 4 Block Diagram 13
- 5 Pin Definition 14
- 6 Functional Description 18
- 6.4 Pad Type Setup 22
- 6.6 System Enable and Reset 23
- 6.7 Clock Domain Systems 24
- Panel Active Window 26
- Blank Range 26
- HSYNC Output 26
- VSYNC Output 26
- 6.9 Output Data Path 27
- 6.10 Special Output Setup 28
- Input VSYNC 29
- Output VSYNC 29
- 6.12 TCON Function 30
- 6.15 Background 2 33
- 6.17 Auto Blank Screen 34
- Input Image Window 35
- HSYNC Input 35
- VSYNC Input 35
- (Internal VD) 36
- R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 37
- G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 37
- B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 37
- 6.20.7 RGB565 38
- 6.21 Input Mode Selection 39
- Background 41
- 6.24 Scaling Engine 42
- 6.25 Timing Adjustment 45
- Pre-Image Enhancement 46
- Post-Image Enhancement 46
- 6.26.3 Sharpness Process 47
- 6.26.7 LUT Gamma Correction 48
- 6.26.8 Dither 48
- Factor 0x80 49
- 6.27 PWM Function 50
- R_PWM_REF 51
- Base on panel clock 51
- R_PWM_FREQ 51
- R_PWM_DUTY 51
- Base on reference clock 51
- 6.28.5 VBI Data Slicer 55
- 6.28.6 Source Detection 55
- 6.28.7 Luminance Process 56
- 6.28.8 Chroma Process 57
- 6.28.9 Comb Filter Process 58
- 6.28.10 AGC and ACC Process 60
- 6.28.11 AFE and PLL Control 63
- 6.30 Serial RGB Output 68
- 6.31 BIT1690 Interface 68
- 6.32 OSD Function 69
- 6.32.2 OSD Memory Mapping 70
- R_Wx_INDEXS 71
- R_Wx_INDEXE 71
- R_BANK_SEL = 000 72
- If Display RAM 72
- {0x503[4],0x403[6:0]} = 72
- {0x501[4],0x401[6:0]} 73
- R_Wx_INDEX_S 76
- R_OSD_LAYER[2:0] = 001 77
- 6.32.7 OSD Clock Control 79
- 6.33 Timer 80
- 6.34 IR Decoder Function 81
- 6.35 GPI and KEY Function 82
- 6.36 PLL and OSC Pads 82
- 6.37 Auto Detection 83
- 01: From VSYNC1 Pin 85
- 10: From HSYNC2 Pin 85
- 11: From VSYNC2 Pin 85
- 7 User Interface 86
- 7.2.1 Architecture 89
- 7.2.2 Instruction Set 91
- 7.2.3 Start and Interrupt 94
- 7.2.6 Watch Dog Timer 95
- 7.2.8 TWSI Write/Read 96
- 7.2.9 SPI Interface 96
- 7.2.10 Debug Mode 96
- 7.3 Slave Mode 97
- 7.3.2 TWSI Protocol 98
- From Pin 104 Setting 100
- From Pin 105 Setting 100
- 8 Timing Diagram 101
- 9 Electrical Characteristic 103
- 10 Soldering Information 104
- 11 Package Information 105
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