
BIT1612 10-Bit Digital Video Decoder with OSD and T-CON
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6.5 GPO (General Purpose Output) Function
BIT1612 內部提供 8 個GPO Register control輸出、其可分別規劃為High Level、Low Level、Tri-State和Status
四種狀態。其相關Registers設定請參考
Table 6-8 和 Table 6-9。
Table 6-8 General Purpose Output Register
Mnemonic Address R/W Bits Description Default
GPO Port Enable
0: Disable
R_GPO_SEL 0x008[7:0] RW 8
1: Enable
0x00
GPO Port Type
0: Normal
R_GPO_TYPE 0x009[7:0] RW 8
1: Tri-State
0xFF
GPO Port Value
0: Low Level
R_GPO_REG 0x00A[7:0] RW 8
1: High Level
0x00
Table 6-9 General Purpose Output Pads Setup Table
GPO Pin Name/ No. Output Pin Register Recommended Setting
GPO[0] SRGB_D0(44) R_GPO_OUT (0x13C[5]) = 1
GPO[1] SRGB_D1(45) R_GPO_OUT (0x13C[5]) = 1
GPO[2] SRGB_D2(46) R_GPO_OUT (0x13C[5]) = 1
GPO[3] SRGB_D3(47) R_GPO_OUT (0x13C[5]) = 1
GPO[4] SRGB_D4(48) R_GPO_OUT (0x13C[5]) = 1
GPO[5] SRGB_D5(49) R_GPO_OUT (0x13C[5]) = 1
GPO[6] PWM1(74) R_GPO_SEL[6] = 1
GPO[7] PWM2(75) R_GPO_SEL[7] = 1
GPO[0] ROUT[0](11) R_GPO_SEL[0] = 1
GPO[1] ROUT[1](12) R_GPO_SEL[1] = 1
GPO[2] GOUT[0](22) R_GPO_SEL[2] = 1
GPO[3] GOUT[1](23) R_GPO_SEL[3] = 1
GPO[4] BOUT[0](34) R_GPO_SEL[4] = 1
GPO[5] BOUT[1](35) R_GPO_SEL[5] = 1
6.6 System Enable and Reset
BIT1612 可以從外部SRST PIN (Pin 101) 輸入一個大於 16 個XCLK Cycles的Low訊號,BIT1612 將被強制
Reset 回到Power On 時的狀態。相關波形請參考
Figure 6-3。
Reset Pulse must be longer than 16 XCLK cycles
RESET
PIN
Figure 6-3 Hardware Reset Waveform
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