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BIT1612 10-Bit Digital Video Decoder with OSD and T-CON
56
0: 50Hz
1: 60Hz
Auto 50/60Hz Detection Mode (R_AUFD=1)
0: Normal Mode
1: Fast Mode
Color Standard Detection
0: Manual Color Standard (Defined on 0x0F1[6:4])
R_STD_AUTO 0x0F1[2] RW 1
1: Auto Color Standard
0
Auto Color Standard Detection Mode Selection
0: Semi-Auto Mode
R_STD_MOD 0x0F1[3] RW 1
1: Fully-Auto Mode
0
R_STD_SEL0 0x0F1[6:4] RW 3
Color Standard Setup for Manual Setting and
Semi-Auto on 50Hz
000
Color Standard Setup for Semi-Auto on 60Hz
000: PAL/PAL-60
001: PAL_N
010: SECAM
011: PAL_M
100: NTSC_4.43_50Hz
101: NTSC_M / NTSC_J
110: NTSC_4.43_60Hz
R_STD_SEL1 0x0F2[2:0] RW 3
111: Black & White
101
6.29 Video Decoder Status Register
BIT1612 Built-In Video Decoder 提供下列 Read Only Registers，以便讀取 BIT1612 內部 Status，相關
Registers 請參考下表。
Table 6-55 Video Decoder Status Register
Mnemonic Address R/W Bits Description Default
R_DAGC1_OUT 0x16E[7:0] R 8 Digital AGC1 Tracer Value -
R_DCLAMP1_OUT 0x16F[7:0] R 8 Digital Clamp1 Tracer Value -
R_DAGC2_OUT 0x170[7:0] R 8 Digital AGC2 Tracer Value -
R_DCLAMP2_OUT 0x171[7:0] R 8 Digital Clamp2 Tracer Value -
R_AAGC1_OUT 0x172[1:0] R 2 Analog ACG1 Tracer Value -
R_AAGC2_OUT 0x172[3:2] R 2 Analog AGC2 Tracer Value -
R_CHROMA_GAINOUT
0x172[7:4],
0x173[7:0]
R 12 Chroma GAIN Tracer Value -
Color Standard Detection Result
000: PAL
001: PAL_N
010: SECAM
011: PAL_M
100: NTSC_4.43_50Hz
101: NTSC_M / NTSC_J
110: NTSC_4.43_60Hz
R_COLOR_STANDARD 0x174[2:0] R 3
111: Black & White
-
50/60Hz Detection
0: 50Hz
R_FIDT_O 0x174[3] R 1
1: 60Hz
-
H-LOCK Ready
0: Not Ready
R_HLCK_O 0x174[4] R 1
1: Ready
-
R_SYNC_READY_O 0x174[5] R 1 Auto Sync Detection Ready -
R_STD_READY_O 0x174[6] R 1 Auto Color Standard Detection Ready -
R_COLORDET 0x174[7] R 1 Color Detection Result -
- BIT1612 1
- Content 2
- 1 General Description 11
- 2 Features 11
- 3 Order Information 13
- 4 Block Diagram 13
- 5 Pin Definition 14
- 6 Functional Description 18
- 6.4 Pad Type Setup 22
- 6.6 System Enable and Reset 23
- 6.7 Clock Domain Systems 24
- Panel Active Window 26
- Blank Range 26
- HSYNC Output 26
- VSYNC Output 26
- 6.9 Output Data Path 27
- 6.10 Special Output Setup 28
- Input VSYNC 29
- Output VSYNC 29
- 6.12 TCON Function 30
- 6.15 Background 2 33
- 6.17 Auto Blank Screen 34
- Input Image Window 35
- HSYNC Input 35
- VSYNC Input 35
- (Internal VD) 36
- R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 37
- G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 37
- B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 37
- 6.20.7 RGB565 38
- 6.21 Input Mode Selection 39
- Background 41
- 6.24 Scaling Engine 42
- 6.25 Timing Adjustment 45
- Pre-Image Enhancement 46
- Post-Image Enhancement 46
- 6.26.3 Sharpness Process 47
- 6.26.7 LUT Gamma Correction 48
- 6.26.8 Dither 48
- Factor 0x80 49
- 6.27 PWM Function 50
- R_PWM_REF 51
- Base on panel clock 51
- R_PWM_FREQ 51
- R_PWM_DUTY 51
- Base on reference clock 51
- 6.28.5 VBI Data Slicer 55
- 6.28.6 Source Detection 55
- 6.28.7 Luminance Process 56
- 6.28.8 Chroma Process 57
- 6.28.9 Comb Filter Process 58
- 6.28.10 AGC and ACC Process 60
- 6.28.11 AFE and PLL Control 63
- 6.30 Serial RGB Output 68
- 6.31 BIT1690 Interface 68
- 6.32 OSD Function 69
- 6.32.2 OSD Memory Mapping 70
- R_Wx_INDEXS 71
- R_Wx_INDEXE 71
- R_BANK_SEL = 000 72
- If Display RAM 72
- {0x503[4],0x403[6:0]} = 72
- {0x501[4],0x401[6:0]} 73
- R_Wx_INDEX_S 76
- R_OSD_LAYER[2:0] = 001 77
- 6.32.7 OSD Clock Control 79
- 6.33 Timer 80
- 6.34 IR Decoder Function 81
- 6.35 GPI and KEY Function 82
- 6.36 PLL and OSC Pads 82
- 6.37 Auto Detection 83
- 01: From VSYNC1 Pin 85
- 10: From HSYNC2 Pin 85
- 11: From VSYNC2 Pin 85
- 7 User Interface 86
- 7.2.1 Architecture 89
- 7.2.2 Instruction Set 91
- 7.2.3 Start and Interrupt 94
- 7.2.6 Watch Dog Timer 95
- 7.2.8 TWSI Write/Read 96
- 7.2.9 SPI Interface 96
- 7.2.10 Debug Mode 96
- 7.3 Slave Mode 97
- 7.3.2 TWSI Protocol 98
- From Pin 104 Setting 100
- From Pin 105 Setting 100
- 8 Timing Diagram 101
- 9 Electrical Characteristic 103
- 10 Soldering Information 104
- 11 Package Information 105
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