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BIT1612 10-Bit Digital Video Decoder with OSD and T-CON
31
6.22 Auto Switch
BIT1612 針對Input Windows、Scaling Factor和Timing setup提供兩組Register設定，可分別設定為自動或手
動切換模式，當在自動模式時BIT1612 將會判別輸入訊號為 50Hz or 60Hz自動切換至相對應的Register群組，其
相關Registers設定請參考
Table 6-23。
Table 6-23 Auto Switch Register
Mnemonic Address R/W Bits Description Default
Auto Switch Mode
0: Manual Mode
R_AUTO_SWITCH 0x04A[6] RW 1
1: Auto Mode
1
Manual Mode Selection
0: Select Mode 0
R_SWITCH_MODE 0x04A[7] RW 1
1: Select Mode 1
1
6.23 Display Window Setup
BIT1612 定義了一個Display Window的區域，將Scaling後的影像資料顯示於此區域內，因此在Timing許可下
，可任意做上下左右Move (Pan) 和Resize的動作，其相關Registers設定請參考
Table 6-24，相對應之示意圖請
參考
Figure 6-20。
Table 6-24 Display Windows Register
Mnemonic Address R/W Bits Description Default
R_PRDIS_ACTX 0x052[6:4], 0x04F[7:0] RW 11
Display Window Pre-Scaling Active
Horizontal Width
0x1E0
R_DIS_YS 0x052[1:0], 0x050[7:0] RW 10 Display Window Vertical Start Position 0x005
R_DIS_YW 0x052[3:2], 0x051[7:0] RW 10 Display Window Vertical End Position 0x0F0
R_DIS_XS 0x055[1:0], 0x053[7:0] RW 10 Display Window Horizontal Start Position 0x020
R_DIS_XW 0x055[6:4], 0x054[7:0] RW 11 Display Window Horizontal End Position 0x200
R_DIS_XW1 0x058[2:0], 0x056[7:0] RW 11
Display Window Active Horizontal Width
On Linear Mode: Define All Region
On Anzoom Mode: Define 2 Region
0x320
R_DIS_XW2 0x058[6:4], 0x057[7:0] RW 11
Display Window Active Horizontal Width
On Linear Mode: No Active
On Anzoom Mode: Define 1 and 3 Region
0x320
Blank Range
(0,0)
R_OS_XP
R_OS_YP
HSYNC Output
VSYNC Output
Display Window
Panel Active Window
R_DIS_XS
R_DIS_ACTX
R_DIS_YS
Background
Color
R_DIS_XW
R_DIS_ACTY
R_DIS_YW
Figure 6-20 Display Window Setup
- BIT1612 1
- Content 2
- 1 General Description 11
- 2 Features 11
- 3 Order Information 13
- 4 Block Diagram 13
- 5 Pin Definition 14
- 6 Functional Description 18
- 6.4 Pad Type Setup 22
- 6.6 System Enable and Reset 23
- 6.7 Clock Domain Systems 24
- Panel Active Window 26
- Blank Range 26
- HSYNC Output 26
- VSYNC Output 26
- 6.9 Output Data Path 27
- 6.10 Special Output Setup 28
- Input VSYNC 29
- Output VSYNC 29
- 6.12 TCON Function 30
- 6.15 Background 2 33
- 6.17 Auto Blank Screen 34
- Input Image Window 35
- HSYNC Input 35
- VSYNC Input 35
- (Internal VD) 36
- R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 37
- G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 37
- B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 37
- 6.20.7 RGB565 38
- 6.21 Input Mode Selection 39
- Background 41
- 6.24 Scaling Engine 42
- 6.25 Timing Adjustment 45
- Pre-Image Enhancement 46
- Post-Image Enhancement 46
- 6.26.3 Sharpness Process 47
- 6.26.7 LUT Gamma Correction 48
- 6.26.8 Dither 48
- Factor 0x80 49
- 6.27 PWM Function 50
- R_PWM_REF 51
- Base on panel clock 51
- R_PWM_FREQ 51
- R_PWM_DUTY 51
- Base on reference clock 51
- 6.28.5 VBI Data Slicer 55
- 6.28.6 Source Detection 55
- 6.28.7 Luminance Process 56
- 6.28.8 Chroma Process 57
- 6.28.9 Comb Filter Process 58
- 6.28.10 AGC and ACC Process 60
- 6.28.11 AFE and PLL Control 63
- 6.30 Serial RGB Output 68
- 6.31 BIT1690 Interface 68
- 6.32 OSD Function 69
- 6.32.2 OSD Memory Mapping 70
- R_Wx_INDEXS 71
- R_Wx_INDEXE 71
- R_BANK_SEL = 000 72
- If Display RAM 72
- {0x503[4],0x403[6:0]} = 72
- {0x501[4],0x401[6:0]} 73
- R_Wx_INDEX_S 76
- R_OSD_LAYER[2:0] = 001 77
- 6.32.7 OSD Clock Control 79
- 6.33 Timer 80
- 6.34 IR Decoder Function 81
- 6.35 GPI and KEY Function 82
- 6.36 PLL and OSC Pads 82
- 6.37 Auto Detection 83
- 01: From VSYNC1 Pin 85
- 10: From HSYNC2 Pin 85
- 11: From VSYNC2 Pin 85
- 7 User Interface 86
- 7.2.1 Architecture 89
- 7.2.2 Instruction Set 91
- 7.2.3 Start and Interrupt 94
- 7.2.6 Watch Dog Timer 95
- 7.2.8 TWSI Write/Read 96
- 7.2.9 SPI Interface 96
- 7.2.10 Debug Mode 96
- 7.3 Slave Mode 97
- 7.3.2 TWSI Protocol 98
- From Pin 104 Setting 100
- From Pin 105 Setting 100
- 8 Timing Diagram 101
- 9 Electrical Characteristic 103
- 10 Soldering Information 104
- 11 Package Information 105
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